James Platt

I am an Electrical Engineering Student at The University of Manchester and the Electronics Sub-team Lead for their Formula Student team, Manchester Stinger Motorsports.

My interests sit at the intersection of embedded systems, hardware design, low-level software (primarily C/C++) and, more recently, FPGA development in VHDL.

Since school, I’ve spent years building things; from CAN nodes to mesh radio networks. I use this website to document a collection of both completed and ongoing projects, in a slightly less formal style than I’ve used before.

You can find more through my posts, or find me on GitHub and LinkedIn.